20-2: A 9GHz 72fs-Total-Integrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler

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. F . Buccoleri 1* , S. M. Dartizio 1* , F . Tesolin 1 , L. Avallone 2 , A. Santiccioli 1 , A. Iesurum 3 , G. Steffan 2 , A. Bevilacqua 3 , L. Bertulessi 1 , D. Cherniak 2 , C. Samori 1 , A. L. Lacaita 1 , S. Levantino 1.

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. Self Introduction. B. Sc. Degree in EE from Politecnico di Milano, in 2017. M. Sc. Degree ( cum laude ) in EE from Politecnico di Milano, in 2019. My research interests include: the design of mm-wave oscillators and high-performance frequency synthesizers for 5G.